FIG. 1 illustrates a backside illuminated (“BSI”) image sensor 100 including a photodiode (“PD”) region 105 disposed within a silicon P−epitaxial (“epi”) layer 110. Pixel circuitry for operation of the BSI image sensor is formed over a P well 115. Only the transfer transistor and the reset transistor of the pixel circuitry are illustrated. A first metal layer M1 for coupling to the gates of the transfer and reset transistors is disposed within an inter-metal dielectric layer 120.
BSI image sensor 100 is photosensitive to light incident upon the backside of the sensor die. For BSI image sensors, the majority of photon absorption occurs near the backside silicon surface. To separate the electron-hole pairs created by photon absorption and drive the electrons to PD region 105, an electric field near the back silicon surface is helpful. This electric field may be created by doping the back surface and laser annealing. Laser annealing is an annealing process which creates localized heating.
For a thick P−epi layer 110, the laser pulse raises the back surface temperature greatly (e.g., in excess of 1000 C), but due to the short pulse, the temperature reduces quickly in the bulk of the silicon. However, when the silicon is thin (e.g., P−epi layer 110<4 um thick), the insulation from inter-metal dielectric layer 120 and the remainder of the back-end-of-the-line (“BEOL”) may cause a significant increase in substrate temperature that can result in deleterious effects, such as dopant diffusion at temperatures greater than 800 C and/or BEOL metal deterioration/melting at temperatures greater than 400 C.
This problem may be solved by using a thicker final silicon layer 110, which can be produced by removing only a portion of the bulk substrate during the backside thinning process. Retaining a thick layer of silicon between the backside and the front side places the high temperature back surface further away from the dopant profiles and metal/silicide contacts on the front side. However, increasing this thickness results in increased electrical crosstalk between adjacent pixels in an imaging sensor array. Therefore, the trend has been to make P−epi layer 110 thinner (e.g., on the order of 1.5 to 3.0 um).